In recent years, semiconductor integrated circuits dedicated to specific functions and objects for limited fields and applications, such as ASSP (Application Specific Standard Produce), are increasingly in demand. As various kinds of semiconductor integrated circuits are developed in order to be dedicated to specific functions and objects, such semiconductor integrated circuits have consequently lots of varieties. Further, as some varieties may possibly be produced in a small amount, reducing cost for new development may be requested. Thus, an effort made as much as possible to develop a semiconductor integrated circuits having different logic without a significant change of an existing process may contribute to reducing a period of time and the cost for the development.
Thus, use of writable semiconductor integrated circuits is known as a technology for reducing a period of time for development. For instance, an FPGA (Field Programmable Gate Array) (refer to, e.g., Japanese Laid-Open Patent Publication No. 2006-20329) and a PLD (Programmable Logic Device) are listed as writable semiconductor integrated circuits.
The FPGA is constituted by a lookup table (called LUT (Look Up Table) hereafter), a CLB (Configurable Logic Blocks) including a D-FF (D-Flip Flop), and a switch matrix interconnecting a plurality of the CLBs. The FPGA uses an SRAM (Static Random Access Memory) so as to hold content of the LUT, an operation mode of the D-FF and a state of the switch matrix.
Meanwhile, the PLD uses an EEPROM (Electrically Erasable And Programmable Read Only Memory) instead of an SRAM. Further, a technology for using a resistor as a switch instead of a storage element such as an SRAM or an EEPROM is known (refer to, e.g., Japanese Laid-Open Patent Publication No. 2005-101535).
Further, use of a Structured ASIC (Application Specific Integrated Circuit) is known as a technology for reducing a period of time for development. The Structured ASIC is an ASIC constituted by a plurality of kinds of circuits integrated in advance (refer to, e.g., Japanese Laid-Open Patent Publication No. 2007-528167).
In a case where a writable semiconductor integrated circuit is used, however, according to the technology for using a resistor as a switch, e.g., a special making process is added to a via so that the resistor is formed. In which via layer the resistor is formed is indefinite, though. Thus, there is a problem in that the special making process is requested for a process for making a plurality of via layers, causing the making process to be complicated.
Further, in a case where a writable semiconductor integrated circuit is used, as a process for writing implemented circuit data into the semiconductor integrated circuit is requested, there is a problem in that the cost increases depending on a produced amount.
Then, e.g., as using an SRAM as described above, the FPGA has a problem of a lower degree of integration and lower speed than the ASIC and so on. As using an EEPROM similarly as the FPGA, the PLD has a problem of a low degree of integration and low speed. Further, the FPGA and the PLD have a problem of requiring a large area and a manufacturing cost owing to the low degree of integration.
Further, the Structured ASIC has a problem of including a plurality of circuits which are not practically used in a plurality of kinds of circuits which are integrated in advance. Moreover, there is a problem in that development of a semiconductor integrated circuit of different logic causes a change of three to four wiring layers and via layers, and thus the cost increases.